Hardware Acceleration for Object Detection using YOLOv5 Deep Learning Algorithm on Xilinx Zynq FPGA Platform

Authors

  • Taoufik Saidani Department of Computer Science, Faculty of Computing and Information Technology, Northern Border University, Saudi Arabia | Laboratory of Electronics and Microelectronics (EμE), Faculty of Sciences, Monastir University, Tunisia
  • Refka Ghodhbani Department of Computer Science, Faculty of Computing and Information Technology, Northern Border University, Saudi Arabia | Laboratory of Electronics and Microelectronics (EμE), Monastir University, Faculty of Sciences, Tunisia
  • Ahmed Alhomoud Department of Computer Sciences, Faculty of Computing and Information Technology, Northern Border University, Saudi Arabia
  • Ahmad Alshammari Department of Computer Sciences, Faculty of Computing and Information Technology, Northern Border University, Saudi Arabia
  • Hafedh Zayani Department of Electrical Engineering, Faculty of Engineering, Northern Border University, Saudi Arabia
  • Mohammed Ben Ammar Department of Information Systems, Faculty of Computing and Information Technology, Northern Border University, Saudi Arabia
Volume: 14 | Issue: 1 | Pages: 13066-13071 | February 2024 | https://doi.org/10.48084/etasr.6761

Abstract

Object recognition presents considerable difficulties within the domain of computer vision. Field-Programmable Gate Arrays (FPGAs) offer a flexible hardware platform, having exceptional computing capabilities due to their adaptable topologies, enabling highly parallel, high-performance, and diverse operations that allow for customized reconfiguration of integrated circuits to enhance the effectiveness of object detection accelerators. However, there is a scarcity of assessments that offer a comprehensive analysis of FPGA-based object detection accelerators, and there is currently no comprehensive framework to enable object detection specifically tailored to the unique characteristics of FPGA technology. The You Only Look Once (YOLO) algorithm is an innovative method that combines speed and accuracy in object detection. This study implemented the YOLOv5 algorithm on a Xilinx® Zynq-7000 System on a Chip (SoC) to perform real-time object detection. Using the MS-COCO dataset, the proposed study showed an improvement in resource utilization with approximately 42 thousand (78%) look-up tables, 56 thousand (52%) flip-flops, 65 (46%) BRAMs, and 19 (9%) DSPs at a frequency of 250 MHz, improving the effectiveness compared to previous simulated results.

Keywords:

object detection, YOLOv5, high level synthesis, FPGA, HDL coder

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How to Cite

[1]
Saidani, T., Ghodhbani, R., Alhomoud, A., Alshammari, A., Zayani, H. and Ben Ammar, M. 2024. Hardware Acceleration for Object Detection using YOLOv5 Deep Learning Algorithm on Xilinx Zynq FPGA Platform. Engineering, Technology & Applied Science Research. 14, 1 (Feb. 2024), 13066–13071. DOI:https://doi.org/10.48084/etasr.6761.

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