Intellectual Property Design with PUF-based Hardware Security
Received: 4 April 2024 | Revised: 4 May 2024 and 21 May 2024 | Accepted: 29 May 2024 | Online: 2 August 2024
Corresponding author: Srinivas Sabbavarapu
Abstract
With the advent of networked systems in almost all current applications, security poses a great threat to the design industry. The participation of several people in different design abstract stages in the hierarchical design industry makes the design vulnerable to security threats. To address these security issues, this study used PUFs to create signatures on Intellectual Property (IP) to protect against malicious attacks. The proposed method exhibits significant resilience to ML-based attacks.
Keywords:
hardware security, trojan, Intellectual Property (IP)Downloads
References
U. Guin, K. Huang, D. DiMase, J. M. Carulli, M. Tehranipoor, and Y. Makris, "Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain," Proceedings of the IEEE, vol. 102, no. 8, pp. 1207–1228, Aug. 2014.
D. Agrawal, S. Baktir, D. Karakoyunlu, P. Rohatgi, and B. Sunar, "Trojan Detection using IC Fingerprinting," in 2007 IEEE Symposium on Security and Privacy (SP ’07), Berkeley, CA, USA, May 2007, pp. 296–310.
G. T. Becker, F. Regazzoni, C. Paar, and W. P. Burleson, "Stealthy dopant-level hardware Trojans: extended version," Journal of Cryptographic Engineering, vol. 4, no. 1, pp. 19–31, Apr. 2014.
S. Ghandali, G. T. Becker, D. Holcomb, and C. Paar, "A Design Methodology for Stealthy Parametric Trojans and Its Application to Bug Attacks," in Cryptographic Hardware and Embedded Systems – CHES 2016, Santa Barbara, CA, USA, Aug. 2016, pp. 625–647.
C. Paar, "Hardware Trojans and Other Threats against Embedded Systems," in Proceedings of the 2017 ACM on Asia Conference on Computer and Communications Security, Abu Dhabi, United Arab Emirates, Dec. 2017.
S. Bhunia, M. S. Hsiao, M. Banga, and S. Narasimhan, "Hardware Trojan Attacks: Threat Analysis and Countermeasures," Proceedings of the IEEE, vol. 102, no. 8, pp. 1229–1247, Dec. 2014.
M. Tehranipoor and F. Koushanfar, "A Survey of Hardware Trojan Taxonomy and Detection," IEEE Design & Test of Computers, vol. 27, no. 1, pp. 10–25, Jan. 2010.
K. Xiao, D. Forte, Y. Jin, R. Karri, S. Bhunia, and M. Tehranipoor, "Hardware Trojans: Lessons Learned after One Decade of Research," ACM Transactions on Design Automation of Electronic Systems, vol. 22, no. 1, Feb. 2016, Art. no. 6.
S. Adee, "The Hunt For The Kill Switch," IEEE Spectrum, vol. 45, no. 5, pp. 34–39, May 2008.
Y. Jin and Y. Makris, "Hardware Trojans in Wireless Cryptographic ICs," IEEE Design & Test of Computers, vol. 27, no. 1, pp. 26–35, Feb. 2010.
S. Skorobogatov and C. Woods, "Breakthrough Silicon Scanning Discovers Backdoor in Military Chip," in Cryptographic Hardware and Embedded Systems – CHES 2012, Leuven, Belgium, 2012, pp. 23–40.
O. Bronchain, L. Dassy, S. Faust, and F. X. Standaert, "Implementing Trojan-Resilient Hardware from (Mostly) Untrusted Components Designed by Colluding Manufacturers," in Proceedings of the 2018 Workshop on Attacks and Solutions in Hardware Security, Toronto, Canada, Jan. 2018, pp. 1–10.
S. Yu, C. Gu, W. Liu, and M. O’Neill, "A Novel Feature Extraction Strategy for Hardware Trojan Detection," in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain, Oct. 2020, pp. 1–5.
K. Hasegawa, M. Yanagisawa, and N. Togawa, "Trojan-feature extraction at gate-level netlists and its application to hardware-Trojan detection using random forest classifier," in 2017 IEEE International Symposium on Circuits and Systems (ISCAS), Baltimore, MD, USA, May 2017, pp. 1–4.
K. Yang, M. Hicks, Q. Dong, T. Austin, and D. Sylvester, "A2: Analog Malicious Hardware," in 2016 IEEE Symposium on Security and Privacy (SP), San Jose, CA, USA, May 2016, pp. 18–37.
S. Bhasin and F. Regazzoni, "A survey on hardware trojan detection techniques," in 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, May 2015, pp. 2021–2024.
R. Kumar, P. Jovanovic, W. Burleson, and I. Polian, "Parametric Trojans for Fault-Injection Attacks on Cryptographic Hardware," in 2014 Workshop on Fault Diagnosis and Tolerance in Cryptography, Busan, Korea (South), Sep. 2014, pp. 18–28.
S. Pagliarini, J. Sweeney, K. Mai, S. Blanton, L. Pileggi, and S. Mitra, "Split-Chip Design to Prevent IP Reverse Engineering," IEEE Design & Test, vol. 38, no. 4, pp. 109–118, Dec. 2021.
J. Rajendran, V. Jyothi, O. Sinanoglu, and R. Karri, "Design and analysis of ring oscillator based Design-for-Trust technique," in 29th VLSI Test Symposium, Dana Point, CA, USA, May 2011, pp. 105–110.
A. Waksman and S. Sethumadhavan, "Silencing Hardware Backdoors," in 2011 IEEE Symposium on Security and Privacy, Oakland, CA, USA, May 2011, pp. 49–63.
M. Potkonjak, A. Nahapetian, M. Nelson, and T. Massey, "Hardware Trojan horse detection using gate-level characterization," in Proceedings of the 46th Annual Design Automation Conference, San Francisco, CA, USA, Jul. 2009, pp. 688–693.
L. Lin, W. Burleson, and C. Paar, "MOLES: malicious off-chip leakage enabled by side-channels," in Proceedings of the 2009 International Conference on Computer-Aided Design, San Jose, CA, USA, Nov. 2009, pp. 117–122.
Y. Alkabani and F. Koushanfar, "Consistency-based characterization for IC Trojan detection," in Proceedings of the 2009 International Conference on Computer-Aided Design, San Jose, CA, USA, Nov. 2009, pp. 123–127.
A. Baumgarten, A. Tyagi, and J. Zambreno, "Preventing IC Piracy Using Reconfigurable Logic Barriers," IEEE Design & Test of Computers, vol. 27, no. 1, pp. 66–75, Feb. 2010.
X. Zhang and M. Tehranipoor, "Case study: Detecting hardware Trojans in third-party digital IP cores," in 2011 IEEE International Symposium on Hardware-Oriented Security and Trust, San Diego, CA, USA, Jun. 2011, pp. 67–70.
R. Torrance and D. James, "The state-of-the-art in semiconductor reverse engineering," in Proceedings of the 48th Design Automation Conference, San Diego, CA, USA, Mar. 2011, pp. 333–338.
S. Wei and M. Potkonjak, "Scalable Hardware Trojan Diagnosis," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 20, no. 6, pp. 1049–1057, May 2012.
J. M. K. K. A. Mehdi, "A Distributed-bit SEC-DED RAM with a Self-Testing and Repairing Engine," International Journal of Performability Engineering, vol. 1, no. 1, Jul. 2005, Art. no. 79.
N. Q. Luc, T. T. Nguyen, D. H. Quach, T. T. Dao, and N. T. Pham, "Building Applications and Developing Digital Signature Devices based on the Falcon Post-Quantum Digital Signature Scheme," Engineering, Technology & Applied Science Research, vol. 13, no. 2, pp. 10401–10406, Apr. 2023.
S. S. Kumar, J. Guajardo, R. Maes, G. J. Schrijen, and P. Tuyls, "Extended abstract: The butterfly PUF protecting IP on every FPGA," in 2008 IEEE International Workshop on Hardware-Oriented Security and Trust, Anaheim, CA, USA, Jun. 2008, pp. 67–70.
B. N. Bukke, K. Manjunathachari, and S. Sabbavarapu, "Implementation of a Finite Impulse Response Filter using PUFs to Avoid Trojans," Engineering, Technology & Applied Science Research, vol. 13, no. 6, pp. 12151–12157, Dec. 2023.
N. N. Anandakumar, S. K. Sanadhya, and M. S. Hashmi, "Design, Implementation and Analysis of Efficient Hardware-Based Security Primitives," in 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC), Salt Lake City, UT, USA, Oct. 2020, pp. 198–199.
K. Dey, M. Kule, and H. Rahaman, "PUF Based Hardware Security: A Review," in 2021 International Symposium on Devices, Circuits and Systems (ISDCS), Higashihiroshima, Japan, Mar. 2021, pp. 1–6.
C. Herder, M. D. Yu, F. Koushanfar, and S. Devadas, "Physical Unclonable Functions and Applications: A Tutorial," Proceedings of the IEEE, vol. 102, no. 8, pp. 1126–1141, May 2014.
Downloads
How to Cite
License
Copyright (c) 2024 Devi Pradeep Podugu, Srinivas Sabbavarapu, A. Kamala Kumari
This work is licensed under a Creative Commons Attribution 4.0 International License.
Authors who publish with this journal agree to the following terms:
- Authors retain the copyright and grant the journal the right of first publication with the work simultaneously licensed under a Creative Commons Attribution License that allows others to share the work with an acknowledgement of the work's authorship and initial publication in this journal.
- Authors are able to enter into separate, additional contractual arrangements for the non-exclusive distribution of the journal's published version of the work (e.g., post it to an institutional repository or publish it in a book), with an acknowledgement of its initial publication in this journal.
- Authors are permitted and encouraged to post their work online (e.g., in institutional repositories or on their website) after its publication in ETASR with an acknowledgement of its initial publication in this journal.