Fabrication of Si/CdTe Heterostructure via Vacuum Thermal Evaporation: Synthesis and Properties Characterization
Received: 21 June 2025 | Revised: 6 September 2025 and 13 September 2025 | Accepted: 15 September 2025 | Online: 8 December 2025
Corresponding author: Sadulla Sadullayev
Abstract
This study focuses on the investigation of a heterostructure fabricated using the Vacuum Thermal Evaporation (VTE) technique and presents the X-ray structural analysis of the compound obtained using the VTE method. The study also determines the optimum pressure and temperature for the production of silicon cadmium tellurium compound. The analysis showed that the Silicon–Cadmium Telluride (nSi–pCdTe) heterojunction, formed on a silicon substrate, consists of a CdTe epitaxial layer with an estimated thickness of approximately 10 μm, followed by a 2–3 μm interfacial transition region at the CdTe/Si interface. The heterostructure of nSi-pCdTe current-voltage (I–V) characteristics, capacitance-voltage (C–V), and spectral features were the main subjects of the investigation.
Keywords:
CdTe, heterostructure, VTE, epitaxy, IV characteristics, spectral characteristics, heterojunctionDownloads
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Copyright (c) 2025 Ibrokhim Sapaev, Sadulla Sadullayev, Utkurjon Rakhmonov

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