A High-Efficiency Hybrid Resonant Converter with 2:1 Conversion Ratio and Inductor Bypass for Loss Reduction
Received: 5 March 2025 | Revised: 9 April 2025 | Accepted: 19 April 2025 | Online: 4 June 2025
Corresponding author: Xuan Thanh Pham
Abstract
Fully integrated power management is crucial for many applications but has been proven to be challenging due to the limitations of passive components. This paper introduces a voltage regulator that uses an on-chip LC resonator to reduce the number of off-chip passive components. When integrated on-chip, the inductors interact with internal capacitors, causing trapezoidal ringing and power loss during off-time. To address these problems, a simple bypass scheme was proposed and added to the LC tank. As a result, the bypass scheme helped achieve at least 5% higher efficiency compared to a converter without an inductor bypass. The proposed design implemented in the 180 nm CMOS process occupies a chip area of 2.88 mm2, and the voltage regulator achieved an efficiency of 95% at 2.4 V input voltage, with a peak efficiency of 89% in closed-loop utilization. Furthermore, the light-load efficiency was extended using Off-Time Modulation (OTM), resulting in a minimal under/overshoot of less than 100 mV during output load transients ranging from 6-105 mA/80 ns.
Keywords:
anti-ringing, DC-DC converter, resonant converters, voltage regulator, switched-capacitorDownloads
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