Offline Analysis of a Modified dqPLL Architecture based on THD Compensation Blocks for Three-Phase Grid-Tied Inverters
Received: 11 January 2025 | Revised: 10 February 2025 and 24 February 2025 | Accepted: 27 February 2025 | Online: 4 June 2025
Corresponding author: Khalil Gassara
Abstract
The control of electrical energy in intelligent smart grids is an important task that takes place in the control and synchronization block of the connected inverters, even for three-phase smart grids, because the supplied three-phase voltage source is distorted and contains disturbing harmonics that need to be filtered. In general, Phase-Locked Loops (PLLs) are the most widely used circuits to address this problem due to their high-speed controllability of the grid voltage and their direct influence on the Grid-Side Converter (GSC). This paper presents a new PLL architecture, based on the classical synchronous reference frame PLL (dqPLL), and aimed at filtering harmonics from the input signal for a three-phase smart grid application, structure. Our proposed architecture for harmonic filtering demonstrates its efficiency compared to the classical dqPLL by inserting a real three-phase vector acquired from a real three-phase voltage source. A comparative study of the results obtained between the two PLL architectures is presented and shows the effectiveness of our proposed structure by providing full compensation of the Total Harmonic Distortion (THD) from 9.052% to 0.36%.
Keywords:
smart grids, Phase-Locked Loop (PLL), grid side converter, inverters, synchronous reference frame Phase-Locked Loop (dqPLL)Downloads
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Copyright (c) 2025 Khalil Gassara, Bilel Gassara, Ahmed Fakhfakh, Santiago De Pablo
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