QUOC, D. B. L.; VO, P. L.; THIEN, P. N. P.; TRAN, L. High-Performance In-Memory XNOR Computing: A 65 nm 12T SRAM Architecture for Neural Network Acceleration. Engineering, Technology & Applied Science Research, Greece, v. 15, n. 4, p. 24930–24939, 2025. DOI: 10.48084/etasr.11646. Disponível em: https://etasr.com/index.php/ETASR/article/view/11646. Acesso em: 5 mar. 2026.