Performance Investigation of Different Topologies of 1-100 GHz on-chip Transformers using 130 nm SiGe BiCMOS

Authors

  • S. Gomha Department of Electrical Engineering, Pan African University Institute for Basic Sciences Technology and Innovation, Kenya and Faculty of Engineering, University of Medical Sciences and Technology, Sudan
  • K. Langat Department of Telecommunication and Information Engineering, Jomo Kenyatta University of Agriculture and Technology, Kenya
Volume: 9 | Issue: 6 | Pages: 5006-5010 | December 2019 | https://doi.org/10.48084/etasr.3205

Abstract

In this study, modeling and designing different topologies of on-chip transformers are presented using 130nm SiGe BiCMOS technology. Interleaved, stacked, and full symmetrical interleaved transformers are investigated. Octagon and square shapes are used for designing transformers with flipped and non-flipped feed lines. A comparison between performances of various configurations is presented using a full-wave simulator. The octagon stacked transformer with flipped feed lines showed a good performance at around 60GHz. The simulated results demonstrated a coupling factor K of 0.94, minimum insertion loss of 1.01518dB, and Q-factor of 9 with a minimum occupied area of 0.0019mm2.

Keywords:

on-chip transformer, 130nm SiGe BiCMOS technology, interleaved transformer, stacked transformer

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How to Cite

[1]
Gomha, S. and Langat, K. 2019. Performance Investigation of Different Topologies of 1-100 GHz on-chip Transformers using 130 nm SiGe BiCMOS. Engineering, Technology & Applied Science Research. 9, 6 (Dec. 2019), 5006–5010. DOI:https://doi.org/10.48084/etasr.3205.

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