Comparative Assessment of Gate Drive Control Schemes in High Frequency Converter

  • N. Z. Yahaya Power & Energy System Research Cluster, Universiti Teknologi Petronas, Malaysia
  • K. M. Begam Electronic Material & Devices Research Cluster, Universiti Teknologi Petronas, Malaysia
  • M. Awan Electronic Material & Devices Research Cluster, Universiti Teknologi Petronas, Malaysia
Keywords: gate drive control, high frequency, PSpice simulation, synchronous rectifier buck converter


Several gate drive control schemes are simulated and the results show that the Fixed Duty ratio (FDR) can help drive synchronous rectifier buck converter (SRBC) correctly with low dead time and hence reduce body diode conduction loss. Even though FDR is prone to cross-conduction effects, the design is simple. Apart from that, Adaptive Gate Delay (AGD) and Predictive Gate Delay (PGD) control schemes have also shown high level of efficiency. However, AGD generates more losses. Even though the total switching loss in PGD has not improved much of only 1 %, more than 82 % efficiency has been achieved in spite of the advantage in FDR and AGD schemes.


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