A Novel Modeling and Control Design of the Current-Fed Dual Active Bridge Converter under DPDPS Modulation

This paper proposes a novel control design for a Current-Fed Dual Active Bridge (CFDAB) converter in boost mode. The Double PWM plus Double Phase Shifted (DPDPS) modulation is applied to the converter due to its considerable merits. A small-signal model is developed to control the output voltage stably in boost mode. Simulations of the control design for the CFDAB converter were conducted to verify the proposed model. The results show that the system can achieve high performance, not only in the dynamic response but also in the steady-state. Keywords-Current-Fed Dual Active Brigde (CFDAB) converter; small-signal model; Double PWM plus Double Phase Shifted (DPDPS) modulation

INTRODUCTION Nowadays, the growth in renewable power systems urges researchers and engineers to solve the problems of managing integrated storages and exchange powers to enhance overall system efficiency. In order to connect the battery at low voltage to the DC link at high voltage in a storage system, the utilized DC/DC converter needs to have a high gain voltage factor and an ability of bidirectional transferring power. The DC/DC converters can be classified as isolated and non-isolated. Between these two, the isolated DC/DC converter is highly recommended for its high reliability. It is able to eliminate current leakage in the system. This undesired current is the cause of EMI, additional loss, and unsafe installation and operation [1]. Another advantage of the isolated DC/DC converter is that the flexible gain ratio can be obtained by using a high frequency transformer [2,3]. The Dual Active Bridge (DAB) converter belongs to the isolated DC/DC type and is well-known for its advantages of high frequency operating ability, inherit zero voltage switching, and bidirectional power flow [4][5][6]. The structure of the DAB can have modified flexibly with different power sources [7][8]. The DAB converter is divided into two categories: Voltage-Fed (VFDAB) and Current-Fed (CFDAB). When using the VFDAB structure in a variety of applications [9][10][11], the voltage source is directly supplied to the converter, which produces high current ripple and becomes large and costly. Besides, the VFDAB needs a bulky capacitor in series-connection with the primary coil to avoid the flux saturation of the transformer [11]. Therefore, the CFDAB structure is used to deal with these problems, the input interleave boost inductors in CFDAB help to decrease the current ripple significantly, and ZVS can be achieved for all switches over a wide range of load [9][10][11][12].
On the other hand, a small-signal model needs to be built for the accurately controlling problem. Naturally clamped CFDAB modeling structure has been introduced in [13,14]. Besides, a state-space model under SPSPWM modulation for interleaved boost CFDAB structure is mentioned in [15]. In the current research, DPDPS modulation technique in comparison with SPSPWM modulation [9] is applied, and a small-signal model to regulate the output voltage is built up in boost mode. The simulation results show the effectiveness of the proposed method.

1) Operation Principles
The applied structure of CFDAB converter in this research is presented in Figure 1, which consists of 2 main parts: the interleaved boost part and the dual active full-bridge part. In the interleaved boost part, two DC inductors are considered as two current sources. The inductor L dc1 is combined with the left leg containing the switch pair Q 1 , Q 1a to create the first boost converter, while the right leg containing the Q 2 , Q 2a switch pair is combined with the inductor L dc2 to create the second boost converter. These boost converters are 180˚ phase-shifted in order to compose an interleaved boost part, in which the boost voltage is kept by the clamp capacitor C c.
On the other hand, the dual active full-bridge part consists of two H-bridge modules in two sides of an isolated high frequency transformer with the turn ratio of N: 1. The voltages of the clamp capacitor and the output capacitor are assumed as the Low-Voltage Side (LVS) and High-Voltage Side (HVS). The bidirectional transfer power between the LVS, the HVS, and the power flow are determined by the phase shifted angle. The AC inductor L r , which is the sum of the primary-referred transformer leakage inductor, which can be considered as a power link between the two sides of the converter.

2) Modulation Strategy
Due to the high amount of switch devices and inductors, the modulation strategy for the converter needs to be considered before designing the control loop. To handle the voltage ratio variation problems and to minimize the conduction loss in power transfer stages, the PWM plus Phase Shifted (PPS) is introduced while the duty cycle for HVS switches is equal to 50% and the duty ratio for the main LVS switches Q 1 , Q 2 is a variable D. However, in the non-power transfer stage of PPS, the circulation loss is significant with high leak current spike. An additional phase shifted in Double PWM plus Double Phase Shifted (DPDPS) method [9], which equals to (2 D 1) / 2 s T − × , is applied to eliminate the leak current spike. Figure Pulse patterns, transformer voltage, and leakage current waveforms.

3) Control Structure
For CFDAB converter structure, the transfer power is related to the clamp voltage V c and the phase shifted E ϕ between the two H-bridges. Therefore, the control structure in boost mode has to control the voltage of the clamp capacitor and the output capacitor simultaneously. There are two pairs of control variables: V c −d and V o −ϕ , as presented in Figure 4.

B. Small Signal Modeling
It is required to determine the transfer functions of the two pairs of control variables mentioned above so that the control scheme in Figure 4 can be implemented. The transfer function perturbations between clamp voltage ˆc v and duty ratiod is depicted in (1) In this paper, the small signal model along with the closed loop controller is proposed to regulate the output voltage of the converter under DPDPS modulation. In the secondary side, the output capacitor is charged and discharged in power transfer and non-power transfer stage respectively. From the switching sequence in Figure 3, the time interval of each switching mode is given by: The relationship between small signals of variables is presented in Table I Replacing (2) to (4) we get: Using the perturbations of duty ratio, phase-shifted angle output voltage, and clamp voltage we have: Discarding the steady-state value and the second order perturbations and assuming that ˆˆ0 By Laplace transformation, the transfer function from ˆo v to φ in the frequency domain can be expressed as:

C. Simulation Verification
The control design with the proposed method is firstly verified by simulation in Matlab/Simulink ( Figure 5). The specifications of the converter are given in Table II and A PI controller is applied to regulate the output voltage: The output voltage close loop transfer can be written as: The simulation scenario consists of 4 steps: the clamp capacitor is charged from 0 to 0.2s, at 0.2s the V c controller starts and the LVS switches are enabled, at 0.25s the V o controller starts and in the final step, the load changes suddenly to the nominal value. Figures 6, 7 show the simulation results of clamp and output voltage respectively. As can be observed, in the start-up period, the voltages of the two capacitors are charged and controlled to increase gradually as well as track the reference values with negligible error and no over-shoot.   Furthermore, the currents through the boost inductor and the leakage inductor with little spike in the start interval which ensure the feasibility of the control design in the experiment, are shown in Figures 8 and 9. The clamp voltage and the out voltage decrease slightly, about 3V, at 0.45s when the nominal load is changed. After that, they quickly return to the reference value within 0.01s and 0.03s. In steady-state operation, the voltages on both the LVS and HVS side of the transformer along with leakage current are shown in Figure 9. Due to the small difference between the reference of clamp voltage and the output voltage, the bias current in the leakage current helps HVS switches achieve the ZVS easier [16]. In addition, the switches voltage and current are presented for S 1 and Q 2 in Figures 10 and 11.  III. CONCLUSION The current paper presents the control structure along with the modeling of the CFDAB converter in boost mode. A small signal model is built up with the chosen modulation technique to control the output voltage of the converter. Simulations were carried out to verify both the proposed model and the control design. The simulation results prove the good performance of the control design not only in the steady-state but also in the dynamic responses.