Comparison of a Chaotic Cryptosystem with Other Cryptography Systems
The keyspace of a cryptography system must be long enough in order to protect it from brute force attacks. The One-Time Pad (OTP) encryption is unconditionally secure because of its truly random keystream that is used only once. This paper proposes a new chaotic symmetric cryptosystem approach, comparable to OTP. The proposed system utilizes two Lorenz generators, a main and an auxiliary, where the aim of the second one is to make one of the main Lorenz generator’s parameters to vary continually with time in a chaotic manner. This technique was built on digitizing two Lorenz chaotic models to increase the security level. The scrambling scheme was developed and the Lorenz stream cipher binary stream successfully passed the NIST randomness test. The cryptosystem showed a high degree of security, as it had a keyspace of 2576, and it was compared with existing symmetric key cryptography systems, such as DES, 3DES, AES, Blowfish, and OTP.
A. S. Alshammari, "Synchronization of Two Chaotic Stream Ciphers in Secure CDMA Communication Systems," Engineering, Technology & Applied Science Research, vol. 10, no. 4, 2020, pp. 5947-5952, Aug. 2020. DOI: https://doi.org/10.48084/etasr.3569
I. Ahmad, A. Saaban, A. Ibrahin, and M. Shahzad, "A Research on the Synchronization of Two Novel Chaotic Systems Based on a Nonlinear Active Control Algorithm," Engineering, Technology & Applied Science Research, vol. 5, no. 1, pp. 739-747, Feb. 2015. DOI: https://doi.org/10.48084/etasr.434
A. Elsharkawi, R. M. El-Sagheer, H. Akah, and H. Taha, "A Novel Image Stream Cipher Based On Dynamic Substitution," Engineering, Technology & Applied Science Research, vol. 6, no. 5, pp. 1195-1199, Oct. 2016. DOI: https://doi.org/10.48084/etasr.729
A. A. Khare, P. B. Shukla, and S. C. Silakari, "Secure and Fast Chaos based Encryption System using Digital Logic Circuit," International Journal of Computer Network and Information Security, vol. 6, no. 6, pp. 25-33, May 2014. DOI: https://doi.org/10.5815/ijcnis.2014.06.04
R. Clayton and M. Bond, "Experience Using a Low-Cost FPGA Design to Crack DES Keys," in Cryptographic Hardware and Embedded Systems - CHES 2002, Berlin, Heidelberg, 2003, pp. 579-592. DOI: https://doi.org/10.1007/3-540-36400-5_42
T. Kean and A. Duncan, "DES key breaking, encryption and decryption on the XC6216," in Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251), Apr. 1998, pp. 310-311.
G. Heidari-Bateni and C. D. McGillem, "Chaotic sequences for spread spectrum: an alternative to PN-sequences," in 1992 IEEE International Conference on Selected Topics in Wireless Communications, Jun. 1992, pp. 437-440.
X. Wang, X. Wang, J. Zhao, and Z. Zhang, "Chaotic encryption algorithm based on alternant of stream cipher and block cipher," Nonlinear Dynamics, vol. 63, no. 4, pp. 587-597, Mar. 2011. DOI: https://doi.org/10.1007/s11071-010-9821-4
W. Wong, L. Lee, and K. Wong, "A modified chaotic cryptographic method," Computer Physics Communications, vol. 138, no. 3, pp. 234-236, Aug. 2001. DOI: https://doi.org/10.1016/S0010-4655(01)00220-X
M. S. Baptista, "Cryptography with chaos," Physics Letters A, vol. 240, no. 1, pp. 50-54, Mar. 1998. DOI: https://doi.org/10.1016/S0375-9601(98)00086-3
M. A. Aseeri, M. I. Sobhy, and P. Lee, "Lorenz chaotic model using Filed Programmable Gate Array (FPGA)," in The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002, Aug. 2002, vol. 1, p. I-527.
G. R. Goslin, "Guide to using field programmable gate arrays (FPGAs) for application-specific digital signal processing performance," in High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic, Oct. 1996, vol. 2914, pp. 321-331. DOI: https://doi.org/10.1117/12.255830
K. M. Cuomo, A. V. Oppenheim, and S. H. Strogatz, "Synchronization of Lorenz-based chaotic circuits with applications to communications," IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 40, no. 10, pp. 626-633, Oct. 1993. DOI: https://doi.org/10.1109/82.246163
L. Cong and W. Xiaofu, "Design and realization of an FPGA-based generator for chaotic frequency hopping sequences," IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, vol. 48, no. 5, pp. 521-532, May 2001. DOI: https://doi.org/10.1109/81.922455
M. S. Azzaz, C. Tanougast, S. Sadoudi, and A. Dandache, "Real-time FPGA implementation of Lorenz's chaotic generator for ciphering telecommunications," in 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference, Jun. 2009, pp. 1-4. DOI: https://doi.org/10.1109/NEWCAS.2009.5290495
D. Majumdar, R. Moritz, H. Leung, and J. M. Brent, "An enhanced data rate chaos-based multilevel transceiver design exploiting ergodicity," in MILCOM 2010 Military Communications Conference, Oct. 2010, pp. 1256-1261. DOI: https://doi.org/10.1109/MILCOM.2010.5680115
P. Giard, G. Kaddoum, F. Gagnon, and C. Thibeault, "FPGA implementation and evaluation of discrete-time chaotic generators circuits," in IECON 2012 - 38th Annual Conference on IEEE Industrial Electronics Society, Oct. 2012, pp. 3221-3224. DOI: https://doi.org/10.1109/IECON.2012.6389382
L. Merah, A. Ali-Pacha, N. H. Said, and M. Mamat, "Design and FPGA implementation of Lorenz chaotic system for information security issues," Applied Mathematical Sciences, vol. 7, pp. 237-246, 2013. DOI: https://doi.org/10.12988/ams.2013.13022
S. Liu, J. Sun, Z. Xu, and Z. Cai, "An Improved Chaos-Based Stream Cipher Algorithm and its VLSI Implementation," in 2008 Fourth International Conference on Networked Computing and Advanced Information Management, Sep. 2008, vol. 2, pp. 191-197. DOI: https://doi.org/10.1109/NCM.2008.11
S. Sadoudi, C. Tanougast, and M. S. Azzaz, "A new robust additive hyperchaos masking algorithm for secure digital communications," in 2013 International Conference on Control, Decision and Information Technologies (CoDIT), May 2013, pp. 501-504. DOI: https://doi.org/10.1109/CoDIT.2013.6689595
Y. Wu, Y. Zhou, and L. Bao, "Discrete Wheel-Switching Chaotic System and Applications," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 12, pp. 3469-3477, Dec. 2014. DOI: https://doi.org/10.1109/TCSI.2014.2336512
G. Alvarez and S. Li, "Some basic cryptographic requirements for chaos-based cryptosystems," International Journal of Bifurcation and Chaos, vol. 16, no. 8, pp. 2129-2151, 2006. DOI: https://doi.org/10.1142/S0218127406015970
G. Álvarez, F. Montoya, M. Romera, and G. Pastor, "Cryptanalyzing a discrete-time chaos synchronization secure communication system," Chaos, Solitons & Fractals, vol. 21, no. 3, pp. 689-694, Jul. 2004. DOI: https://doi.org/10.1016/j.chaos.2003.12.013
A. Shehata, "Secure Computer Communications and Databases Using Chaotic Encryption Systems," Ph.D. dissertation, University of Kent, 2000.
L. R. Knudsen, "Block ciphers-analysis, design and applications", Ph. D. dissertation, Department of Computer Science, Aarhus University, 1994. DOI: https://doi.org/10.7146/dpb.v23i485.6978
MetricsAbstract Views: 92
PDF Downloads: 70
Copyright (c) 2020 Author
This work is licensed under a Creative Commons Attribution 4.0 International License.
Authors who publish with this journal agree to the following terms:
- Authors retain the copyright and grant the journal the right of first publication with the work simultaneously licensed under a Creative Commons Attribution License that allows others to share the work with an acknowledgement of the work's authorship and initial publication in this journal.
- Authors are able to enter into separate, additional contractual arrangements for the non-exclusive distribution of the journal's published version of the work (e.g., post it to an institutional repository or publish it in a book), with an acknowledgement of its initial publication in this journal.
- Authors are permitted and encouraged to post their work online (e.g., in institutional repositories or on their website) after its publication in ETASR with an acknowledgement of its initial publication in this journal.