Swarm Optimization-Based Modified Selective Harmonic Elimination PWM Technique Application in Symmetrical H-Bridge Type Multilevel Inverters

The problem of elimination of harmonics and the need of a large number of switches in multilevel inverters (MLIs) have been a hot topic of research over the last decades. In this paper, a new variant swarm optimization (SO) based selective harmonic elimination (SHE) technique is described to minimize harmonics in MLIs, which is a complex optimization problem involving nonlinear transcendental equation. Optimum switching angles are calculated by the proposed algorithms considering minimum total harmonic distortion (THD) and the best results are taken for controlling the operation of MLIs. The performance of the proposed algorithm is compared with the genetic algorithm (GA). Conventional MLIs have some disadvantages such as the requirement of a large number of circuit components, complex control, and voltage balancing problems. A novel seven-level reduced switch multilevel inverter (RS MLI) is proposed in this paper to recoup the need of a large number of switches. Matlab/Simulink software is used for the simulation of two symmetrical topologies, i.e., a seven-level cascaded H-bridge multilevel inverter (CHB MLI) and a seven-level (RS MLI). Simulation results are validated by developing a prototype of both MLIs. The enhancement of the output voltage waveform confirms the effectiveness of the proposed SO SHE approach. Keywords-swarm optimization; selective harmonic elimination; multilevel inverter; cascaded H-bridge multilevel inverter; genetic algorithm; reduced switch multilevel inverter; selected harmonic elimination; total harmonic distortion; modulation index


INTRODUCTION
Nowadays many industrial drives require high or medium power for their operation and some require high power with medium voltage.Recently [1,2], multilevel inverters are evolving as an alternative in high output power and medium voltage applications.MLI consists of many power semiconductor switches and a number of voltage sources, allowing integration of renewable energy sources with it [3][4][5][6].MLI produces a staircase voltage output thus reducing the THD as the output waveform in close proximity to sinusoidal waveform [7][8][9].As the number of level increases, harmonic distortion reduces more, but not without increasing the cost and complicacy.MLIs are generally categorized into three types: diode clamped MLI (DC MLI) [10], flying capacitor MLI (FC MLI) [11], and CHB MLI.DC MLI requires a large number of diodes, FC MLI requires voltage balancing of more capacitors and thereby has augmented cost.CHB MLI is more advantageous in respect to low dv/dt stress, less EMI noise and less THD than the other types [12,13].CHB MLI is made up of a series connected separate single phase bridge inverters, which operate with separate DC voltage source.This paper presents the design of a single phase seven-level cascaded Hbridge MLI using 12 switches aiming to reduce lower order harmonics which produce staircase voltage output waveform.The output voltage waveform is not purely sinusoidal, and it contains a number of odd order harmonics.The higher order harmonics can be easily reduced by using filters, but the lower order dominant harmonics are difficult to reduce.Authors in [14][15][16] explained different methods to reduce harmonics using pulse width modulation (PWM) and selected harmonic elimination (SHE) method.Lower-order harmonics are dominant in nature and complete elimination of these harmonics is not possible using conventional PWM techniques.SHE or programmed PWM technique [17] approach is thus used to eliminate specific order harmonics by calculating optimal switching angles.Switching angles are calculated by solving transcendental non-linear equations.Iterative techniques such as Newton-Raphson (NR) method [18] and mathematical resultant theory method [19] suffer from many disadvantages in doing so.The former approach fails at a good initial guess and results in only a few sets of solution.The degree of polynomial becomes large when the later approach is applied to higher level asymmetrical MLIs as the number of harmonics to be eliminated increases.Active harmonic elimination method [20] is another combinational approach of NR and resultant theory method for eliminating any number of specific harmonics.This method doesn't suggest finding all possible solutions for the infeasible modulation index.
Evolutionary algorithms have been further developed to overcome shortcomings of conventional methods.GA was an early developed stochastic algorithm that dealt with the SHE problem widely used in the literature [21,29] [22,23,32] is another such bio-inspired algorithm mostly used to eliminate harmonics in MLIs.However, for complex multi-minima functions, PSO fails to locate global optima and also reduces the speed of convergence [22].A hybrid GA-PSO approach considering THD as a fitness function has been successfully demonstrated for CHB MLI in [7].Authors in [24] report an analytical solution for harmonic elimination using bee algorithm for a symmetrical seven-level MLI and proved its superiority over GA.The low-order 5 th and 7 th harmonics are effectively suppressed assuming constant magnitude of DC sources.However, the magnitude of the DC source can be fluctuating when MLI is used in applications such as drives, renewable energy sources, and FACTS devices.
In such cases, new expression needs to be considered which leads to a complex calculation of switching angles for each set of modulation index.In this regard, a new group of optimal harmonic minimization techniques has been investigated in [25][26][27] considering variable DC-link voltage.An analytical solution for THD minimization using online switching angle calculation for equal voltage sources has been suggested in [19].In [28], an online switching angle calculation approach using artificial neural networks has been discussed considering unequal DC sources.However, equal values of DC sources are considered in the present study and a novel optimization approach is developed to deal with the SHE problem.
In this paper, advanced SHE technique was utilized in order to reduce specific lower order harmonics, such as the 5 th and the 7 th , from the output voltage.The technique solves different non-linear equations and gives best optimized results.Furthermore, this paper reports the development of a reduced switch seven-level MLI (RS MLI) topology which uses 7 switches and requires less number of driver circuits.RS MLI produces the same voltage output as CHB MLI and involves less expenditure.Calculation of THD as an optimization problem is also described.GA [29,30] and SO SHE approach are applied to solve non-linear equations for reducing THD.Also, a comparison study drawn between GA and SO SHE approach is provided.The calculated SO SHE data are used for developing simulation models and hardware design.The proposed topology is validated by comparing the results obtained from the simulation and the experimental model.

II. CASCADED H-BRIDGE MLI TOPOLOGY (CHB MLI)
For a single phase 7-level CHB MLI, the structure is shown in Figure 1(a).In this circuit, each voltage source is connected in cascade with other voltage sources via 3 H-bridge circuits.Each H-bridge consists of 4 power semiconductor switches which produce 3 level outputs, i.e., +Vdc, 0 or -Vdc [13].At any instant of time, (Nl-1) numbers of switches are in the current path in a CHB MLI, which incurs more conduction loss.The final voltage in the +ve half cycle is +3Vdc and in -ve half cycle is -3Vdc.The number of levels in an Nl-level MLI is given by 2NDC+1, where NDC denotes the number of DC sources used.Output voltage waveform pattern for the 7-level CHB MLI is shown in Figure 1(b).The overall output voltage of MLI is given by V=Vdc1+Vdc2+Vdc3.In this paper, all three voltage levels are taken equal, i.e.Vdc1=Vdc2=Vdc3=Vdc.In Figure 1  , and 3  are three switching angles needed to be calculated by solving non-linear equations to minimize THD.The number of switches in MLI defines cost, circuit size, reliability and complexity.So the key element in designing a MLI is the number of required switches against the required voltage level.To construct the same output obtained as in a seven-level CHB MLI, a new circuit topology has been developed with a reduced number of switches without increasing the number of H-bridges.Figure 2 The switching scheme of RS MLI is depicted in Table I.Output voltage obtained from a RS MLI with corresponding switching states has been depicted in Figure 2.Although the output voltage is the same, the switching stress in RS MLI is less and the voltage profile can be improved by proper control.

A. Comparison of Conventional and Proposed MLI Topology
In this section the proposed MLI topology is been compared with the conventional CHB MLI, DC MLI, and FC MLI.For generating Nl output voltage levels, the proposed RS MLI requires only (Nl+7)/2 switches (Nsw), whereas conventional MLI topologies need 2(Nl-1) per phase switches.

B. Comparison of Proposed MLI with Recently Developed
Well-Known MLI Topologies The comparison presented above is extended for the recently developed MLI topologies, MLI 1 [1], MLI 2 [29], MLI 3 [7], MLI 4 [2], MLI 5 [34], MLI 6 [36] in terms of number of dc sources (Ndc), number of switches (Nsw), number of diodes (Nd), number of capacitors (Nc), and number of transformers (Ntr).MLI 1 and 2 require the same number of components, whereas the switch count has been reduced in MLI 3, but the total number of components is the same as in MLI 1 and 2 due to the addition of discrete diodes and capacitors.In this regard, MLI 4 requires less components than the afore-mentioned topologies.Furthermore, a few transformer-based topologies are also developed, such as MLI 5 which uses single dc source but also a transformer for producing 7 levels.Other single dc source MLIs reported in [33,35,36] utilize fewer semiconductor switches, smaller total number of components, and thus are superior among the discussed topologies with regard to cost and volume.But, as MLI 6 consists of a capacitor, thus for higher voltage level application, capacitor voltage balancing may be a measure issue in such an MLI.The requirement of components for a 7level RS MLI is summarized in Table II.Although the proposed topology requires a number of dc sources which increases as the voltage level increases, this can be of use in multiple renewable energy source based applications.

IV. THD CALCULATION USING OPTIMIZATION ALGORITHM
As described above, the SHE technique is currently being prominently used to synthesize output voltage of multilevel inverters.The configuration showed in Figures 1(a The even order harmonics automatically get canceled due to quarter wave symmetry, i.e.Bn=0 for all n.So the new equation of output voltage becomes: The amplitude n V can be expressed in terms of Fourier series with  varies in the range of 0 to π/2: The three switching angles 1  , and 3  and the fundamental component of output voltage are controlled using the modulation index.The dominant lower order harmonics need to be eliminated from the output phase voltage.Accordingly, the three non-liner equations for the solution of the problem are taken in this work as: where, (4 ) NDC is the number of DC sources, and f V is the required value of fundamental voltage.Fifth and 7 th order harmonics are targeted for elimination by solving the above non-linear equations.The solution of these equations leads to discontinuity for the certain modulation index.So, the non-linear equations of the SHE problem are solved as an optimization problem.Conventional technique uses NR method to solve the above problem which involves more computation time and complicated mathematical calculations.In order to reduce this, SO SHE is developed which solves the objective function at optimal value of switching angles.The suitable fitness function is chosen to eliminate 5 th and 7 th order harmonics at different value of switching angle and to satisfy the fundamental component as under: Subject to the condition that: To obtain the least THD with feasible modulation index the whole term in ( 6) is multiplied with a factor 1/h.The fundamental value and the targeted 5 th and 7 th order harmonics are kept within 1% (i.e., h=0.01) error limit.To check the quality of voltage waveform, THD can be defined and calculated as: where k V is the voltage of particular harmonics.
V. GENETIC ALGORITHM GA [29,30] is a method of random search process used to find approximate solutions of optimization problems.It is a local search technique inspired by biological evolution.The evolution starts from a random initial population and repeatedly modifies the solution in each generation.Over a successive generation, multiple individuals (switching angle) are selected from the current population and are used in the next iteration of the algorithm until it reaches an optimal solution.GA uses three main rules in each step to create the next generation of the current population, which contributes for the desired results to select the population.Crossover and mutation are used to simulate the natural reproduction and mutation.In crossover, selected individuals are combined and swapped to produce new offspring.With a continuous number of generations and a large population in each generation, the algorithm optimizes a set of solutions of the problem.It computes the different values of the three switching angles to obtain the minimum FF keeping the harmonics within the limit.The GA toolbox is an inbuilt graphical user interface that allows using GA in MATLAB environment without working at the command line [17].The GA toolbox results are shown in Figure 5. Results obtained from GA are summarized in Table III.To use the GA toolbox, the following information should be entered.
• Fitness function: The fitness function as given in (6) has been entered in the form @FF, where FF.m is a program file that computes the fitness function.
• No of variables: The length of input vector to the fitness function is entered.The three switching angles are considered as variables.
• Constraint function for the problems can be specified in the constraints panel of toolbox.Boundary variables can be specified as well.Population size, initial population and display command are set in the options panel.

VI. SO SHE TECHNIQUE
A new variant swarm optimization based algorithm called SO SHE is analyzed in this paper.The theory of SO SHE has been influenced from the same phenomenon as PSO, i.e., bird flocking in which it helps the swarm or particle (bird) in dodging from predators.Similar to the conventional PSO algorithm, SO SHE has a cognitive and a social behavior component.Both these components are composed of best and worst values, but PSO considers only the best value in successive iterations.Including both best and worst values enhances the swarm's ability to follow the best possible solution.The particles progress in the search space with certain velocities and may reach a best or worst solution.The best and worst positions are stored in the memory as good and bad experience components respectively.The food location is modeled as the best solution point and a predator is modeled as the worst position [31,32,37].The new velocity-position update equation in SO SHE model is accordingly modified by ( 9) and ( 10) for ith particle in d dimensional space as: +   (11) where   is the maximum number of allowable iterations and iter is the current iteration.  is set to 0.9 and   is 0.4.

VII. SO SHE ALGORITHM FOR FITNESS EVALUATION
• Randomly create a set of the three switching angles.
• Fitness function (FF) evaluation: Evaluate the FF for each of the switching angles.
• The initial positions until iteration r are considered as the local best position of each particle, i.e.,    and the global best position   is the minimum value of the FF.Similarly, the final positions are considered as the local worst position, i.e.,    and the global worst position   is the maximum value of FF.
• Condition check: Switching angles must satisfy the feasibility criteria that they lie between 0 to π/2 as in (7).
• Updating velocity and position: In this step the particles follow a velocity and position update rule given in ( 9) and (10).New best and worst values are stored in the memory.Iteration continues in the same way until the counter reaches the maximum set value and the new positions of the particles are then calculated.
• Termination: If the iteration count reaches the maximum set value then calculate the fitness function by varying the M from 0 to 1, otherwise repeat the updating procedure.

VIII. GA -PROPOSED SO SHE ALGORITHM COMPARISON
The behaviors of GA and SO SHE algorithm are compared and it is observed that both algorithms converge with acceptable solutions for different modulation indices.Figure 6(a) shows the variation of switching angles obtained using SO SHE for different M. The switching angles satisfy the condition (7).The THD obtained using both algorithms against M is plotted in Figure 6(b) taking a population size of 100 individuals.Lesser THD is obtained at full range of M using SO SHE as compared to GA.This as well signifies that SO SHE converges to a better solution than GA.THD decreases with increase in M, which satisfies the operational principle of MLIs. Figure 6(c) shows the harmonic profile versus the M obtained using the SO SHE algorithm.phase systems, triple harmonic content is not chosen to be eliminated in this paper.Triple harmonics are absent in line to line voltage of a 3 phase balanced system.5 th and 7 th harmonics are nearly zero at almost all values of M which shows the effectiveness of the proposed SO SHE algorithm.Furthermore, to prove the robustness of the algorithm, a test is conducted in MATLAB environment on an Intel(R) core (TM), i5, 2.60 GHz processor taking computational time and attained objective value into consideration when all other conditions are kept unchanged.With 100 individuals per population, both algorithms run 20 times and the results are tabulated at 0.5, 0.7 and 0.9 modulation indices.Table IV shows the best objective value and corresponding computational times for 50, 150 & 300 iterations.The comparison in Table IV summarizes that under the same conditions, SO SHE always converges faster than GA and also approaches to a better solution.In order to validate the proposed MLI topology, simulations have been carried out using MATLAB/Simulink for the sevenlevel CHB MLI and RS MLI.The value of all three DC sources is taken equal to 35V and the frequency of output voltage is assumed to be 50Hz.A series resistive-inductive load of 100Ω -150mH is taken in both cases.The calculated switching angles using SO SHE algorithm at 0.91 modulation index (Table IV) are applied to the simulation and experimental models.The SO SHE programming code run integrated to the simulation model and results are obtained.

A. Simulation of CHB MLI
Insulated gate bipolar transistors (IGBTs) are considered as switching devices for simulation and hardware design of sevenlevel CHB MLIs.Required PWM signals for one switch of each H-bridge (T1, T5 and T9) are shown in Figure 7(a).Figures 7(b) and 7(c) show the simulated output voltage and current waveform, respectively, of a seven-level CHB MLI.The output voltage results in very small THD of 14.33% are shown in Figure 7(d).

B. Simulation of RS MLI
Four IGBTs and three MOSFETs with two discrete diodes were used for designing a seven-level RS MLI.Generated PWM signals for the level generation switches T1, T2 and T3 are shown in Figure 8(a).The simulated output voltage and current waveform of seven-level RS MLI are shown in Figures 8(b) and 8(c).The FFT analysis of the output voltage waveform is shown in Figure 8(d).It is observed that the 5 th and 7 th order harmonics are nearly 0.01% and 0.025%, respectively which is negligible.A comparison of MLI topologies described in this study has been presented in Table V.

C. Hardware Design of CHB MLI
The simulation results are validated by a prototype laboratory setup of seven-level CHB MLI with three isolated DC sources, each of constant voltage 25V.Gate pulse for the switches is generated using an ATmega16 microcontroller.A series resistive-inductive load of 80Ω -50mH is used.The components used for the hardware design of the seven-level CHB MLI are given in Table VI. Figure 9(a) shows the PWM pulses for the switches T1, T5, and T9.The feasible switching angles at M=0.91 given in Table IV are calculated offline using SO SHE algorithm, and were programmed into the microcontroller using WINAVR programmer.10(a) shows the PWM signal for H-bridge S1 and the level generation switches T1, T2, and T3.The offline calculated switching angles are programmed into the ATmega16 microcontroller using a burner circuit.The generated pulses drive the power semiconductor switches.Output voltage and current obtained for the proposed RS MLI across a RL load (80Ω, 50mH) is shown in Figures 10(b) and 10(c).The FFT analysis of the voltage waveform obtained is shown in Figure 10(d).It is evident from the results that the proposed seven-level RS MLI has better performance, less requirements of components, and low %THD compared to the seven-level CHB MLI.Experimental results for 7-level CHB MLI: (a) PWM signals for switches T1, T5, and T9 (y-axis 20V/div, x-axis 2ms/div), (b) Output voltage waveform (y-axis 50V/div, x-axis 1ms/div), (c) Output current waveform (yaxis 1A/div, x-axis 1ms/div), (d) FFT analysis of load voltage  For the proposed RS MLI, a total number of (Nl+3)/2 switches including discrete diodes are in the current path at any time whereas (Nl-1) switches are in the current path for the CHB MLI.This indicates that the conduction loss and voltage drop are also less for the proposed MLI when compared to a CHB MLI.A comparison in view of cost, size and volume is also drawn among seven-level MLI types.Novel SO SHE algorithm is used to determine the optimum switching angles for selectively eliminating voltage harmonics as detailed in the FF.A delineative analysis shows that the proposed SO SHE approach successfully reaches a feasible solution in minimum time compared to GA. Offline calculated switching angles using SO SHE are then applied to the simulation circuit and to the hardware design of both presented MLIs.Simulations and experimental results show that the undesired 5 th and 7 th harmonics are very negligible in the output voltage waveform and THD is reduced by around 3% in seven-level RS MLI in comparison with a CHB MLI.Although the presented scheme has been applied to a single phase seven-level MLI structure, this methodology can easily be extended for developing Nllevel MLI consisting of different loads with succeeding reduction in THD and switching loss further.

Fig. 1 .
Fig. 1.(a) Structure of single phase seven-level CHB MLI, (b) Output voltage waveform of single phase seven-level MLI III.PROPOSED REDUCED SWITCH MLI (a) shows the proposed MLI structure and Figure 2(b) shows the proposed MLI output voltage waveform with corresponding switching states.The H-bridge switches (or polarity generation switches) operate at low switching frequency whereas the level generation switches T1-T3 operate at high switching frequency.Hence, a cost effective solution is to choose low switching power components for the H-bridge and high switching power components for the level generation.In comparison to a CHB MLI the required number of switches in RS MLI is smaller.In CHB MLI 12 switches are used, whereas only 7 switches with 2 discrete diodes are used in design of RS MLI.The working principle of RS MLI is summarized in the following modes: • Mode a: When T1 is ON, current flows through the two diodes, both H-bridge switches S1 and S2.So, voltage output is +Vdc across the load (Figure 3(a)).Similarly when S3 and S4 are switched ON, voltage output is -Vdc.• Mode b: In this mode, switch T2 is made ON.Current flows through diode D2, and switches S1 and S2.So, output voltage is +2Vdc across the load (Figure 3(b)).Similarly when S3 and S4 are switched ON, voltage output is -2Vdc.• Mode c: When T3 is ON, this mode of operation starts.Current flows through switches S1 and S2, so voltage output is +3Vdc across the load.Diodes D1 and D2 are reverse biased (Figure 3(c)).Similarly when S3 and S4 are switched ON, voltage output is -3Vdc.• Mode d: Both S1 and S3 or S2 and S4 are ON in this mode.Switches T1, T2 and T3 are in OFF state.Voltage output obtained across the load is zero (Figure 3(d)).
Fig. 2. (a) Structure of single phase seven-level RSMLI, (b) Output voltage waveform with corresponding switching states

Fig. 3 .Fig. 4 .Figure 4
Fig. 3. Operation of proposed RS MLI for generating positive output voltage levels: (a) Mode a, (b) Mode b, (c) Mode c, (d) Mode d ) and 2(a) produces similar patterns of output voltage.In the output voltage waveform the positive half cycle is equal to the negative half cycle, i.e. quarter wave symmetrical output.The output voltage waveform shown in Figure 2(b) can be expressed in Fourier series as: .: Swarm Optimization-Based Modified Selective Harmonic Elimination PWM Technique …

Fig. 6 .
Fig. 6.(a) Switching angles obtained using SO SHE, (b) Comparison of THD (%) against M for GA and SO SHE, (c) Low order harmonics profile against M.The 3 rd harmonic is as high as expected at the whole range of M. Keeping in mind future applications of the algorithm to 3

Fig. 8 .
Fig. 8. Simulation results obtained for seven-level RS MLI: (a) PWM signals for level generation switches T1, T2, and T3, (b) Output voltage waveform, (c) Output current waveform, (d) FFT analysis of load voltageTLP250 opto-coupler was used as driver and for the isolation.All waveforms were acquired using Tektronix TPS2014B digital storage oscilloscope (DSO) and postprocessed using MATLAB to obtain the harmonic spectrum.Figure9(b) shows the staircase 7-level output.The sinusoidal output current is shown in Figure9(c).Figure9(d)shows the harmonic spectrum, in this case the value of THD is 14.91%.

Figure 9 (
b) shows the staircase 7-level output.The sinusoidal output current is shown in Figure 9(c).

Figure 9 (
d) shows the harmonic spectrum, in this case the value of THD is 14.91%.

TABLE I .
SWITHCING SCHEME OF SEVEN-LEVL RS MLI

TABLE II .
PROPOSED RS MLI -WELL KNOWN 7-LEVEL MLI TOPOLOGIES COMPARISON

objective value in 20 runs, in %
Population=100IX.SIMULATION AND HARDWARE RESULTS

TABLE V .
COMPARISON OF MLI

TABLE VI .
MOSFETs.Similar setup as for CHB MLI is developed and the output is obtained across the RL load.The components used for design of RS MLI are given in TableVII.Figure 7-LEVEL CHB MLI: COMPONENTS USED FOR